Linaro Virtual Connect 2020

This session describes all layers in interrupt sub system starting from ARM Architecture (GIC), Interrupt sub system in Linux kernel , Interfacing of ARM arch. with Linux supported Interrupt sub system.

On 32-bit Linux machines, the 4GB of virtual memory are usually split between 3GB address space for user processes and a little under 1GB directly mapped physical memory.

While kernels can address more physical memory than what is directly mapped, this requires the "highmem" feature that is likely going away in the long run, while there are still systems using 32-bit ARM Linux with 2GB or more that should get kernel updates for many years to come.

As an alternative to highmem, we are proposing a new way to split the available virtual memory, giving 3.75GB of address space to both user space and to the linear physical memory mapping.

In this presentation, we discuss the state of those patches and the trade-offs we found for performance, security and compatibility with existing systems.

An overview of the latest status of Armv8-A architecture enablement for the arm64 Linux Kernel, including security features (Pointer Authentication, BTI, Memory Tagging), system features (MPAM) and new areas of investigation.

Due to the increasing complexity of SoCs, we're now seeing lots of thermal sensors on the die to quickly detect hot spots and allow the OS to take steps to mitigate these events. The Linux thermal framework provides mechanisms such as inputs for better scheduling, frequency throttling, idle injection and turning on fans to prevent the silicon from getting damaged from overheating. This is also called as junction temperature management.

The Linux thermal framework is also used for managing the skin temperature of a device - the temperature that users feel when they hold and use the device. However, this skin temperature management involves manual characterization of performance states for devices such as CPU and GPU to its effect on the skin temperature of the device.

So the framework is doing two distinct tasks: preventing silicon damage and preventing skin burns for users by capping the power of a device. We feel these tasks should be handled by different frameworks.

We're currently experimenting with the kernel's energy model to dynamically build a hierarchy of power constraints and allow the platform integrator to set limits for each power domain using the powercap framework. This will allow the kernel to manage the power consumption (and hence dissipation) budget of the various devices on the Soc more autonomously, leading to better performance at a given power budget instead of overcoming the primary goal of the thermal framework which is mitigate at the limits.

Attendees are expected to know a little bit about how the current thermal framework works but don't need to know all the technical details. We will cover the conceptual differences between the current and proposed models as an introduction in the talk.

Slack channel to chat with the speaker during the live broadcast: https://linaroconnect.slack.com/archives/C01B0106Y9Y

The number of different components on the embedded devices, their performances, and the power they drain put on the front of the scene the thermal framework which was delegated to a second role until recently. We had to find new strategies to cool down the components as well as improve thermal management.
This session provides an update of the different changes in the thermal framework which are now available upstream.

The System Control and Management Interface (SCMI) is a set of operating system-independent software interfaces that have been originally specified to standardize the interface between Application Processors and the power coprocessor. But there are situations where we can't rely on such a power coprocessor. In such a case, the SCMI server has to run a secured partition like OP-TEE. This presentation will describe the status of our PoC of a SCMI server
running as an OP-TEE TA. We will present the design, what is already available, the next features to be added and also how this could be extended to other UCs.

The ARM SCMI specification provides a standardized interface for OS/Firmware coordinated power management. SCMI has been adopted today for platforms primarily targeted at the mobile/client/embedded segment. As Arm-based SoCs increasingly find their way into Infrastructure and Automotive, standardizing Power Management in products targeted at these segments becomes a necessity to prevent software fragmentation.

In this session we will explore how SCMI can be extended to standardize power management for Arm-based SoCs targeted at Infrastructure and Automotive. We will look at how SCMI can work through ACPI which is commonly used in most kernels targeted at the Infrastructure space. We would also have a look at how an Automotive Power Management stack can be setup with the help of SCMI.

Boot-time tracing is one of the latest Linux kernel tracing proposal, which allows us to trace kernel booting with full tracing features, like per-event filters and triggers, histograms, instances, dynamic-events etc. Along with the boot-time tracing the kernel command-line interface is also expanded by Extra Boot Config (XBC) so that user can specify complex boot-time settings with structured-key value configuration file.
This talk will show you what the boot-time tracing and the extra boot config provide, the advantages and how you can use it for your boot-time features.

Chat live with the speakers during the broadcast time here: https://linaroconnect.slack.com/archives/C01B157FTNZ



Abstract:
The Embedded Base Boot Requirements(EBBR) specification defines requirements for embedded systems to enable inter-operability between SoCs, hardware platforms, firmware implementations, and operating system distributions. EBBR is targeted at making operating system/distros agnostic to platform. Same operating system image should run on any hardware with a well-defined firmware interface which is EBBR compliant.

There has been a significant work going on in U-boot with regards to EBBR in the open-source community. Various features like bootefi are already available with many other features in queue.

This presentation aims at explaining how EBBR specifications gets mapped to NXP platforms and demonstrating EBBR compliance for NXP platform. The reference boot-architecture will be based on TFA, u-boot, device-trees, Linux and OPTEE (for secure uefi flow). This will demonstrate distros like SUSE running on NXP SoCs using bootefi command, secure uefi flow, etc

Also efforts are going to ensure that the U-boot is EBBR compliant by running FWTS, SCT for EBBR. The idea is to make the u-boot feature complete and can be demonstrated as EBBR compliance on NXP devices.

Chat live with the speaker of LVC20-207 during the scheduled broadcast time here: https://linaroconnect.slack.com/archives/C01APFU350X


Description:
OpenEuler is an open source, free Linux distribution platform. The platform provides an open community for global developers to build an open, diversified, and architecture-inclusive software ecosystem. OpenEuler is also an innovative platform that encourages everyone to propose new ideas, explore new approaches, and practice new solutions. The openEuler project will launch the 20.09 version in September 2020 includes a many new features. Dr Xiong Wei will introduce the new virtualization implementation platform, the new features in the iSula which is a container engine comply Open Container Initiative specification, a new project base OpenJDK and so on.

The scheduler has been the place of a lot of changes during the past releases with new interfaces to set properties of tasks and/or groups of tasks; Other evolution are ongoing and this session will go through the main changes merged during the past releases and the ongoing discussions for next changes.

Chat live with the speaker during the scheduled broadcast time in the Slack channel here: https://linaroconnect.slack.com/archives/C01B48BGW10

The Arm Architecture is continually evolving to meet the needs of our ecosystem partners. Arm, Linaro, and the wider ecosystem build on the foundations of the Architecture, creating a rich and varied range of products along with associated Firmware and Software, driving the technology of the future.

This talk will introduce the 2020 extensions to the A profile architecture, ahead of the release of the updated register and instruction set XML. It will discuss the software enablement that has been going on, and the future development needs of the wider ecosystem, to ensure that software is available when physical products are delivered.

BoF session to discuss recent changes and current issues in gpio and pinctrl. For GPIO, we have new uAPI in the works and also the recent GPIO aggregator. For pinctrl, gpiod is starting to incorporate certain pinctrl aspects like bias. Linus Walleij, who is the maintainer, told me he thought is would be a good idea and agreed to attend if I organize it.

John Stultz chats with Todd Kjos from Android about GKI v2 and related topics.

A set of short, quick talks about the myriad set of things LCG Team has been upto.

Chat with the speaker of LVC20-309 here: https://linaroconnect.slack.com/archives/C01B7HS936F

The Qualcomm Adreno GPU pushes the boundaries of the ARM SMMUv2 architecture in new and interesting ways. This presentation will discuss some of the new proposed GPU specific features for the ARM SMMUv2 driver such as split pagetables and pagetable switching and future enhancements to improve the GPU/SMMU relationship.

LKFT has been endowed with I/O benchmarks. They measure both I/O throughput with general workloads, and system- and application-level latency under heavy loads. More benchmarks are being evaluated as well. In addition, the current I/O benchmarks are being used as a pilot case, to make a general solution for automatic detection of performance regressions. In this presentation we will describe these interesting developments.

In this talk, the speaker will provide an update on the latest Arm-specific developments in GNU and LLVM open-source toolchain, covering GCC, GDB, Glibc, LLVM, LLDB with focus on latest architecture support and performance improvements. The speaker will provide a roadmap on what is being planned in the near future by Arm and its partners.